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rtc ds1307 at89c2051 seven segment digital clock circuit diagram


Posted by:
Created at: Wednesday 17th of October 2012 07:36:18 AM
Last Edited Or Replied at :Sunday 14th of April 2013 04:08:54 AM
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project i am goi..................[:=> Show Contents <=:]



old Digital clock design


Posted by: projectsofme
Created at: Tuesday 28th of September 2010 10:54:38 PM
Last Edited Or Replied at :Tuesday 28th of September 2010 10:54:38 PM
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rs to any device for measuring and displaying the time. Watches and other timepieces that can be carried on one's person are often distinguished from clocks. The clock is one of the oldest human inventions, meeting the need to consistently measure intervals of time shorter than the natural units: the day; the lunar month; and the year. Devices operating on several different physical processes have been used over the millennia, culminating in the clocks of today.
This clock was made by videoing someone actually painting the time! He's inside your phone with a bucket of paint and manually chang..................[:=> Show Contents <=:]



Laser Communication Systems


Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 01:07:55 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 01:07:55 PM
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compared with heavier and larger RF systems. The narrow beam divergence affords interference free and secure operation.

Background

Until recently, the United States government was funding the development of an operational space laser cross-link system employing solid-state laser technology. The NASA is developing technology and studying the applicability of space laser communication to NASA's tracking and data relay network both as cross-link and for user relay links. NASA's Jet Propulsion Laboratory is studying the development of large space and ground-base receiving stations and payloa..................[:=> Show Contents <=:]



Universal Asynchronous Receiver Transmitter


Posted by: computer science crazy
Created at: Tuesday 07th of April 2009 12:59:19 PM
Last Edited Or Replied at :Tuesday 07th of April 2009 12:59:19 PM
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UART synchronizes the incoming bit stream with the local clock.

Transmitter interfaces to the data bus with the transmitter data register empty (TDRE) and write signals. When transmitting, UART takes eight bits of parallel data and converts it into serial bit stream and transmit them serially.
Receiver interfaces to the data bus with the receiver ready and the read signals. When UART detects the start bit, it receives the data serially and converts it into parallel form and when stop bit (logic high) is detected, data is recognized as a valid data.

UART Transmitter

The UART transmitt..................[:=> Show Contents <=:]



VHDL


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 11:31:34 PM
Last Edited Or Replied at :Sunday 21st of September 2008 11:31:34 PM
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e.

Since one event causes another, simulation proceeds in rounds. The simulator maintains a list of events that need to be processed. In each round, all events in a list..................[:=> Show Contents <=:]



Tri-Gate Transistor


Posted by: computer science crazy
Created at: Sunday 21st of September 2008 01:14:22 PM
Last Edited Or Replied at :Wednesday 22nd of February 2012 11:59:00 PM
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sing (DSP) systems must be done with minimum cost overhead to be commercially viable. While some analog and RF designs have been attempted in mainstream digital-only complimentary metal-oxide semiconductor (CMOS) technologies, almost all designs that require stringent RF performance use bipolar or semiconductor technology. Silicon integrated circuit (IC) products that, at present, require modern bipolar or BiCMOS silicon technology in wired application space include the essential optical network (SONET) and synchronous digital hierarchy (SDH) operating at 10 Gb/s and higher. The viability of a..................[:=> Show Contents <=:]



wide band code division multiple access


Posted by: lini555
Created at: Monday 22nd of March 2010 12:00:34 AM
Last Edited Or Replied at :Wednesday 01st of June 2011 12:23:58 AM
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i want exactly on wide band code division multiple acces..................[:=> Show Contents <=:]



F1 Track Design and Safety


Posted by: computer science crazy
Created at: Saturday 20th of September 2008 10:52:19 PM
Last Edited Or Replied at :Friday 07th of September 2012 02:07:53 PM
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me sort of detail, to assess the safety features of the circuits on which it is raced. The two tasks are very different, and the FIA had to start almost from scratch when it set out to develop software for its Circuit and Safety Analysis System (CSAS).

The last two decades have seen a steady build up of the R&D effort going into vehicle dynamics modeling, particularly by those teams that design and develop cars as well as race them. The pace of development has been set by the availability of powerful PC's, the generation of vehicle and component data, and the supply of suitably qualified g..................[:=> Show Contents <=:]



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